? 2005 fairchild semiconductor corporation ds500421 www.fairchildsemi.com may 2001 revised june 2005 fstD16861 20-bit bus switch with level shifting fstD16861 20-bit bus switch with level shifting general description the fairchild switch fstD16861 provides 20-bits of high- speed cmos ttl-compatible bus switching. the low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. a diode to v cc has been integrated into the circuit to allow for level shifting between 5v inputs and 3.3v outputs. the device is organized as a 10-bit or 20-bit bus switch. when oe 1 is low, the switch is on and port 1a is con- nected to port 1b. when oe 2 is low, port 2a is connected to port 2b. when oe x is high, a high impedance state exists between the a and b ports. features 4 : switch connection between two ports. minimal propagation delay through the switch. low l cc . zero bounce in flow-through mode. control inputs compatible with ttl level. trutranslation voltage translation from 5.0v inputs to 3.3v outputs power-off high impedance inputs and outputs supports live insertion/withdrawal (note 1) note 1: to ensure the high-impedance state during power up or power down, oe should be tied to v cc through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. ordering code: devices also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. trutranslation is trademark of fairchild semiconductor corporation. order number package number package description fstD16861mtd mtd48 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide www.datasheet.co.kr datasheet pdf - http://www..net/
www.fairchildsemi.com 2 fstD16861 connection diagram pin descriptions logic diagram truth table h high voltage level l low voltage level z high impedance pin name description oe 1 , oe 2 bus switch enables 1a n , 2a n bus a 1b n , 2b n bus b inputs inputs/outputs oe 1 oe 2 1a, 1b 2a, 2b ll1a 1b 2a 2b lh1a 1b z hl z 2a 2b hh z z www.datasheet.co.kr datasheet pdf - http://www..net/
3 www.fairchildsemi.com fstD16861 absolute maximum ratings (note 2) recommended operating conditions (note 5) note 2: the ? absolute maximum ratings ? are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum rating. the ? recommended operating conditions ? table will define the conditions for actual device operation. note 3: v s is the voltage observed/applied at either the a or b ports across the switch. note 4: the input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. note 5: unused control inputs must be held high or low. they may not float. dc electrical characteristics note 6: typical values are at v cc 5.0v and t a 25 q c note 7: measured by the voltage drop between a and b pins at the indicated current through the switch. on resistance is determined by t he lower of the voltages on the two (a or b) pins. supply voltage (v cc ) 0.5v to 7.0v dc switch voltage (v s ) (note 3) 0.5v to 7.0v dc input voltage (v in ) (note 4) 0.5v to 7.0v dc input diode current (l ik ) v in 0v 50 ma dc output current (i out )128 ma dc v cc /gnd current (i cc /i gnd ) r 100 ma storage temperature range (t stg ) 65 q c to 150 q c power supply operating (v cc) 4.5v to 5.5v input voltage (v in ) 0v to 5.5v output voltage (v out ) 0v to 5.5v input rise and fall time (t r , t f ) switch control input 0 ns/v to 5 ns/v switch i/o 0 ns/v to dc free air operating temperature (t a )-40 q c to 85 q c symbol parameter v cc t a 40 q c to 85 q c units conditions (v) min typ (note 6) max v ik clamp diode voltage 4.5 1.2 v i in 18 ma v ih high level input voltage 4.5-5.5 2.0 v v il low level input voltage 4.5-5.5 0.8 v v oh high level 4.5-5.5 see figure 3 v i i input leakage current 5.5 r 1.0 p a0 d v in d 5.5v 010 p av in 5.5v i oz off-state leakage current 5.5 r 1.0 p a0 d a, b d v cc r on switch on resistance 4.5 4 7 : v in 0v, i in 64 ma (note 7) 4.5 4 7 : v in 0v, i in 30 ma 4.5 35 50 : v in 2.4v, i in 15 ma i cc quiescent supply current 5.5 1.5 ma oe 1 oe 2 gnd v in v cc or gnd, i out 0 10 p a oe 1 oe 2 v cc v in v cc or gnd, i out 0 ' i cc increase in i cc per input 5.5 2.5 ma one input at 3.4v other inputs at v cc or gnd www.datasheet.co.kr datasheet pdf - http://www..net/
www.fairchildsemi.com 4 fstD16861 ac electrical characteristics note 8: this parameter is guaranteed by design but is not tested. the bus switch contributes no propagation delay other than the rc del ay of the typical on resistance of the switch and the 50pf load capacitance, when driven by an ideal voltage source (zero output impedance). capacitance (note 9) note 9: t a 25 q c, f 1 mhz, capacitance is characterized but not tested. ac loading and waveforms note: input driven by 50 : source terminated in 50 : note: c l includes load and stray capacitance note: input prr 1.0 mhz, t w 500 ns figure 1. ac test circuit figure 2. ac waveforms symbol parameter t a 40 q c to 85 q c, units conditions c l 50pf, ru rd 500 : figure v cc 4.5 ? 5.5v number min max t phl , t plh propagation delay bus-to-bus (note 8) 0.25 ns v i open figures 1, 2 t pzh , t pzl output enable time 1.0 6.0 ns v i 7v for t pzl figures 1, 2 v i open for t pzh t phz , t plz output disable time 1.0 7.0 ns v i 7v for t plz figures 1, 2 v i open for t phz symbol parameter typ max units conditions c in control pin input capacitance 3 pf v cc 5.0v, v in 0v c i/o input/output capacitance ? off state ? 6pfv cc , oe 5.0v, v in 0v www.datasheet.co.kr datasheet pdf - http://www..net/
5 www.fairchildsemi.com fstD16861 output voltage high vs. supply voltage figure 3. www.datasheet.co.kr datasheet pdf - http://www..net/
www.fairchildsemi.com 6 fstD16861 20-bit bus switch with level shifting physical dimensions inches (millimeters) unless otherwise noted 48-lead thin shrink small outline package (tssop), jedec mo-153, 6.1mm wide package number mtd48 technology description the fairchild switch family derives from and embodies fairchild ? s proven switch technology used for several years in its 74lvx3l384(fst3384) bus switch product. fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.datasheet.co.kr datasheet pdf - http://www..net/
|
